IBIS Macromodel Task Group

Meeting date: 05 May 2015

Members (asterisk for those attending):
ANSYS:                      * Dan Dvorscak
                            * Curtis Clark
Avago (LSI)                   Xingdong Dai
                            * Bob Miller
Cadence Design Systems:       Ambrish Varma
                              Brad Brim
                              Kumar Keshavan
                              Ken Willis
eASIC                         David Banas
Ericsson:                     Anders Ekholm
IBM                           Steve Parker
Intel:                        Michael Mirmak
Keysight Technologies:      * Fangyi Rao
                            * Radek Biernacki
			    * Nicholas Tzou
Maxim Integrated Products:    Hassan Rafat
Mentor Graphics:            * John Angulo
                            * Arpad Muranyi
Micron Technology:            Randy Wolff
                              Justin Butterfield
QLogic Corp.                  James Zhou
                              Andy Joy
eASIC                         Marc Kowalski
SiSoft:                     * Walter Katz
                              Todd Westerhoff
                            * Mike LaBonte
Synopsys                      Rita Horner
Teraspeed Consulting Group:   Scott McMorrow
Teraspeed Labs:             * Bob Ross
Texas Instruments:          * Alfred Chong

(Note: Agilent has changed to Keysight)

The meeting was led by Arpad Muranyi.

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Opens:

- None


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Call for patent disclosure:

- None


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Review of ARs:

- Michael M test to see what ibischk does with existing keywords related to model direction.
  - Done.

- Arpad, Randy and Radek prepare Define Package Model BIRD draft ready for Open Forum.
  - Done.

- Michael M update AMI Directionality BIRD
  - Done.

- Arpad to review IBIS specification for min max issues.
  - In progress.


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New Discussion:

PAM4 BIRD:
- Walter: This is submitted
  - There was a question about PAM3.
  - We can deal with that when a standards body approves it.
- Bob Ross asked if there are any concerns about the PAM4 BIRD.
- There were none.
- Bob Ross motioned to send a recommendation approval of the PAM4 BIRD.
- Walter seconded.
- No one objected.

AR: Arpad send recommendation for approval of PAM4 BIRDxxx to Open Forum.


[Define Package Model] BIRD:

- Arpad showed the draft BIRD.
- Arpad: This is on the ATM web archive.
  - This is no longer being called BIRD175, it may be 176.
  - Bob Ross added a table of legal combinations.
  - Notes about background activities have been added.
  - The changed and added text is in red.
  - Model makers desire to create a single package model for multiple power/ground pins.
  - This only applies to power/ground pins where [Pin Mapping] exists.
  - The "merging" pin has the model.
  - The "merged" pins do not, they are joined to the "merging" pin.

- Bob Ross showed a [Define Package Model] Proposed Extension
- Bob R: Randy Wolff will present this at the SPI summit.
- slide 2:
  - Bob R: [Pin Mapping] is the key that allows using a single package model for multiple pins.
    -  The explicit connections have to be specified.
- slide 3:
  - Bob: In this example not all pins are merged together, they are in groups.
- slide 5:
  - Bob: The gray pins will use the default [Pin] RLC models.
- slide 6:
  - Bob: This case has a [Define Package Model] model for all pins.
    - IBIS would support this already.
- slide 7:
  - Bob: This shows pin merging.
    - Pin 3 might be a better choice.
    - This does not use any default RLC connections.
- slide 8:
  - Bob: This shows the case where no pins are in [Pin Numbers].
- slide 9:
  - Bob: This is illegal because there is no [Pin Mapping].
  - Arpad: You can't merge pins from one bus into another bus.
- slide 10:
  - Bob: This is legal.
    - It shows two separate groups for the ground side.
- slide 11:
  - Bob: This is illegal because the Vcc pads are not connected by [Pin Mapping].
    - The ground side has implicit pin merging.
  - John: Why would the model maker do this?
  - Radek: It's not required so we have to provide for the case.
  - Bob: We might default to RLC if not in [Pin Numbers].
  - John: Does the end user need to match the die layout with the pkg?
  - Bob: You're not restricted to a hard-coded choice.
  - John: Is the end user able to handle this?
    - The [MP] keyword should be used.
  - Radek: We could require that they be included in [MP].
  - John: Different Components can use different packages, users need to match them up.
- slide 12 & 13:
  - Bob R: These are more complicated legal cases.
- slide 14:
  - Bob R: It probably will be BIRD176.

- Mike: A model maker might make a [Define Package Model] model for 4 pins, but more are added on.
- Arpad: It's hard to know model maker intent.
- Bob: The reason for an implicit short is because there might be decoupling caps.
- Mike: That is guessing
- Arpad: We found these combinations while developing this.
  - We hope people will use the 
- John: Radek pointed out a scenario earlier.
- Arpad: The different packages can have the same pins but different pin groupings.

- Radek: I would like it to be in 6.1.
- Radek motioned to submit the BIRD to the Open Forum.
- Bob seconded.
- No one objected.

- Arpad: This solves one problem for package models.
  - The BIRD in the interconnect meeting also solves that problem.

AR: Arpad submit [Define Package Model] BIRD to Open Forum.

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Next meeting: 12 May 2015 12:00pm PT
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IBIS Interconnect SPICE Wish List:

1) Simulator directives